The invention relates generally to a digital subscriber line (DSL)-link interface and protocol for a DSL modem. The present invention has particular applicability to personal computer (PC) systems where the digital control and analog front end portions of such a DSL modem are not implemented in a single integrated circuit (IC) for various technical and cost-effective reasons.
It has been consistent in the electronics industry that complex logic functions are integrated into smaller and smaller form factors. For instance, a popular growing trend is to combine audio and telephone capabilities in one device, including graphic and video functions in a computer chipset, and to integrate all computer peripheral functions into a single IO chip. A related general trend in the PC industry is the migration of more and more devices, components, functionality, etc. to the motherboard. This makes sense for a variety of engineering and cost reasons, including the fact that this approach conserves available conventional expansion slots on the system bus, is easier to configure, reduces the total mother board form factor and BOM cost, and preserves compatibility with legacy systems.
At the same time, there are certain components that are not optimally combined or tightly integrated together for a variety of reasons, some of which are engineering related, and some of which are regulatory related. As noted above, there is considerable interest in placing a full scale modem down (directly on) the motherboard, to obtain the aforementioned benefits. From an engineering perspective, however, it is difficult to place the analog I/O portions of a modem directly on a motherboard because of various noise sources present on the latter. Therefore, the signal to noise ratio (SNR) performance of the modem system will decrease. Similarly, from a regulatory perspective, these analog portions of a modem must undergo a certification process in accordance with local applicable telecom rules and regulations before they can be implemented in a commercial product. If it were necessary to subject every motherboard to a new certification process (simply because it now incorporated some modem front end circuitry), this would impede and slow down the development of new products considerably.
Thus, there is a general perception in the industry at this time that, at least for the PC environment, it makes more sense to separate the analog and digital portions of a high speed modem. This has led to a proposal, authored by Intel Corporation, known as the Audio/Modem Riser Specification, in which it is suggested that the analog I/O portions of a modem be moved to a card that is physically separated but easily connected to a motherboard. Version 1.1 of this document, revised on Sep. 10, 1998, is available for downloading via the Internet at Intel""s corporate web site, and is hereby incorporated by reference. In this specification, a portion of which is reproduced in FIG. 1A, it is proposed that the portions of the modem which are susceptible to noise, and which implicate certification issues, be moved to what is known as a Homologated Riser Card. This card has I/O connections to the outside world (i.e., such as to a conventional telephone line) but at the same time fits in a riser connector directly to the motherboard. As the specification indicates, this riser interface is preferably standardized, so the motherboard makers can implement audio/modem capability with lower BOM costs, and with fewer concerns about vendor proprietary variations (i.e., because there is a common footprint that can be stuffed with competing pin compatible implementations). The specification provides a detailed and comprehensive explanation of the electrical and physical requirements required to comply with the proposed standard.
As depicted in FIG. 1A, a modem 100 includes an analog I/O portion 110 located on a riser card 111. This analog I/O portion (sometimes referred to as a codec) is then interfaced through a digital link 120 (known as AC-97) to the digital controller 130 of the modem. The latter digital portion is located directly on a motherboard 131 and generally includes appropriate modem control circuitry, data pumps, and other functional circuits typically associated with those aspects of a modem. These functions can also be performed, for example, by a so-called host signal processing (HSP) embodiment, in which case the AC 97 digital controller (at least for the modem portions anyway) can consist of as little as a very simple bus interface. The preferred implementation for this digital portion is described in another specification published by Intel known as Audio Codec 97. Version 2.1 of this document, published on May 22, 1998, is likewise available for downloading at Intel""s corporate web site, and is also hereby incorporated by reference. As noted therein, the AC97 digital controller can include a wide range of capabilities, including multiple digital audio channels, and suitable interfaces to a PCI bus, a digital I2S bus, etc.
A description of the various I/O, control, and power/ground signals in the AC-97link passing through the riser interface is provided at Tables 1-5 of the aforementioned A/M Riser specification. As seen generally in FIG. 1B, in a voice band modem implementation, the AC 97 link between the digital controller 130 and the analog CODEC 110 consists of a five wire, bi-directional, serial TDM format interface. The signals supported, include the following: RESET (a master hardware reset), BITCLK (12.288 MHz serial data clock), SYNC (48KHz fixed rate sample sync), SDATA_OUT (serial, time division multiplexed input data stream to the PC), and SDATA_IN (serial, time division multiplexed output data stream from the PC). The format and nature of these signals is well-known, and is described in the aforementioned specifications. Digital controller 130 can also including suitable interfaces for other contemporary expansion busses, such as PCI bus 141, USB 142, etc.
While the A/M Riser specification is a step in the right direction, it does not provide for functionality that would permit implementation of an xDSL type modem at this time. For example, xDSL requires a much higher bit rate than that provided by the AC97 link (at a 2.2 MHz sampling and 16 bits wide for an ADSL downstream signal, the total bit rate is 35.2 Mb/s, which is much higher than the 12.288 MHz serial clock). Furthermore, there are various power and control signaling requirements in xDSL that were not foreseen by AC97. Therefore, the AC97 and A/M Riser specification are limited to supporting at most simple analog type (V.90 and the like) modems. This is a significant drawback, since xDSL technologies (and especially ADSL) are expected to be in widespread use in a very short time.
Accordingly, it is a general object of the present invention to overcome the aforementioned problems.
Another object of the present invention, is to provide a DSL modem which is configurable as a motherboard device within a personal computing system, in a manner similar to that only currently possible for voice band type modems;
A related object of the present invention is to provide a DSL modem that has analog codec circuitry and digital controller circuitry both tightly coupled to a PC motherboard, in a manner similar to that only current provided for voice band type modems;
Another object of the present invention is to provide a DSL interface that can properly handle DSL data rates, DSL control signals, and other xDSL related signal requirements so that it is suitable for linking the analog and digital portions of a DSL modem of the aforementioned type;
A related object of the present invention is to provide a DSL interface that is extremely flexible, and can be used in any one of a number of different xDSL technologies, including HDSL, SDSL, ADSL, reduced rate ADSL, etc.;
Another object of the present invention is to provide an improved signal protocol for a DSL link, having data/control word formatting and timing specifications especially suited for a DSL data stream;
A further object of the present invention is to provide a DSL interface that minimizes the required signal and power pins associated with a standardized specification for analog codec components in a personal computing system, and is therefore cost effective, and can be easily integrated by system vendors;
Yet a further object of the present invention, is to provide a DSL digital controller and a DSL codec which can utilize the above novel DSL interface;
An additional object of the present invention, is to provide a personal computer motherboard which is adapted to use the aforementioned DSL modem and DSL interface.
Another object of the present invention is to minimize the required logic complexity in order to support all above functions and features.
These and other objects are effectuated by the following aspects of the present invention.
An improved digital communications link of the present invention connects a digital controller section of an xDSL modemxe2x80x94which is preferably located on a system motherboard of a computing systemxe2x80x94to a separate analog section of the xDSL modem which is located at a position substantially free of electronic noise from other electronic components on said motherboard, which could materially affect the operation of such analog section. The data path/link is generally configured in the following manner: (a) a plurality of receive signal lines are set up for transmitting data from a remote site; (b) a plurality of transmit signal lines are designated for receiving data from a remote site; (c) a bit clock signal line is set up for carrying a clock signal, which clock signal is used in connection with communicating the data to and from the remote site. The bit clock signal line can carry any desired clock signal needed according to data transmission requirements of said digital communications link, thus providing a scalable interface that is easily adaptable for use in any number of different motherboard environments.
An additional word clock signal, derived from the bit clock signal, marks the boundary for each sample word received or transmitted on said plurality of receive signal lines and/or plurality of transmit signal lines respectively.
Another aspect of the present invention includes the use of an improved protocol for exchanging operational and/or control information between separated digital and analog sections of an xDSL modem. This operational and/or control information preferably includes information relating to real time control settings for circuits located within the analog codec, power management, and the like.
During normal operation, the aforementioned receive and/or transmit signal lines can also be used for carrying control words for use by the xDSL modem, which control words are embedded as part of the normal data stream. As a compromise between flexibility and speed, these control words preferably have either a first or second length. The control word has a start bit, followed by a length indicator bit, and then the set of command bits corresponding to the actual command/data value. Idle bits are transmitted continuously between control words. Unlike prior art schemes, the control words are transmitted asynchronously, therefore, in an embedded operations channel (EOC) that has an effective rate equal to the word clock signal.
According to another useful feature of the present invention, the aforementioned link also includes provision for setting up a multi-channel data frame. In this way, two or more data channels can be set up between the digital controller and analog section, with data transferred through a first channel during a first time period of the multi-channel data frame, and through a second channel during a second time period of the multi-channel data frame. To accomplish this, the word clock signal can be adapted to have a different duration for different number of data channels. In one variation, the data channels can have different transmit and/or receive data rates, so as to accommodate multiple codecs, or unequal receive/transmit data stream bit rates (such as ADSL). Accordingly, the single channel limitation of the prior art can be also be overcome by this capability of the present invention.
Yet another useful aspect of the present invention provides that, due to the unique selection of receive/transmit/clock lines and signal protocols, the same receive and/or transmit signal lines can also be used to support a compatible data interface between the digital controller and an ATM based hardware xDSL modem. In other words, the data path can handle ATM packaged data and clocking information, making it extremely versatile and useful for incorporation within a motherboard application.
These aspects of the present invention thus permit an xDSL motherboard, and an xDSL modem to be configured in a manner similar to a voice-band modem.
A computer motherboard, DSL digital controller, DSL codec, and DSL modem of the present invention include otherwise conventional hardware (and/or software in an HSP application) and are all implemented with appropriate interface circuitry and control logic necessary to effectuate the above architecture, characteristics and functionality of the aforementioned DSL link.
Although the inventions are described below in a preferred embodiment associated with a personal computing system, it will be apparent to those skilled in the art the present invention would be beneficially used in any environment where it is desirable to link separated analog/digital portions of an xDSL modem.